A cross-institutional team led by researchers from the Department of Electrical and Electronic Engineering (EEE), under the Faculty of Engineering at The University of Hong Kong (HKU), have achieved a major breakthrough in the field of artificial intelligence (AI) hardware by developing a new type of analog-to-digital converter (ADC) that uses innovative memristor technology. The work is published in Nature Communications.

Challenges with conventional AI hardware Conventional AI accelerators face challenges because the essential components that convert analog signals into digital form are often bulky and power-consuming. Led by Professor Ngai Wong, Professor Can Li and Dr. Zhengwu Liu of HKU EEE, in collaboration with researchers from Xidian University and the Hong Kong University of Science and Technology, the cross-disciplinary research team developed a new type of ADC that uses innovative memristor technology. This new converter can process signals more efficiently and accurately, paving the way for faster, more energy-efficient AI chips.

Adaptive system and efficiency gains The research team created an adaptive system that automatically adjusts its settings based on the data it receives, i.e., dynamically fine-tuning how signals are converted. This results in a 15.1× improvement in energy efficiency and a 12.9× reduction in circuit area compared with state-of-the-art solutions.

A collaborative team has achieved the first monolithic 3D chip built in a U.S. foundry, delivering the densest 3D chip wiring and order-of-magnitude speed gains.

Engineers at Stanford University, Carnegie Mellon University, University of Pennsylvania, and the Massachusetts Institute of Technology have collaborated with SkyWater Technology, the largest exclusively U.S.-based pure-play semiconductor foundry, to develop a novel multilayer computer chip whose architecture could help usher in a new era of AI hardware and domestic semiconductor innovation.

Unlike today’s largely flat, 2D chips, the new prototype’s key ultra-thin components rise like stories in a tall building, with vertical wiring acting like numerous high-speed elevators that enable fast, massive data movement. Its record-setting density of vertical connections and carefully interwoven mix of memory and computing units help the chip bypass the bottlenecks that have long slowed improvement in flat designs. In hardware tests and simulations, the new 3D chip outperforms 2D chips by roughly an order of magnitude.