Lifeboat Foundation

Samsung has introduced (opens in new tab) its all-new type of GDDR6 memory that doubles the DRAM package’s capacity and increases interface width to double its peak bandwidth. Samsung’s GDDR6W chips use traditional BGA packaging and can be used for mainstream applications like the best graphics cards.

Contemporary GDDR6 and GDDR6X chips integrate one DRAM device with a 32-bit interface. By contrast, a GDDR6W chip packs two DRAM devices featuring and therefore features two 32-bit interfaces, thus doubling capacity (from 16Gb to 32Gb per chip) as well as interface width (from 32-bits to 64 bits). To do so, Samsung’s GDDR6W chips use the company’s Fan-Out Wafer-Level Packaging (FOWLP) technology that replaces traditional printed circuit board with a redistribution layer (RDL) that is thinner and has significantly finer wiring patterns.

Samsung’s GDDR6W devices generally use the same protocols as GDDR6 but offer higher performance and capacity. For example, a 32Gb GDDR6W memory chip could deliver a peak bandwidth of 176 GBps, up from 88 GBps in the case of a regular GDDR6 SGRAM chip. Meanwhile, building a 32Gb memory chip using two 16Gb memory devices might be cheaper than building a 32Gb monolithic memory device.

D-Wave Systems, a pioneer in quantum annealing-based computing, today announced significant upgrades to its constrained quadratic model (CQM) hybrid solver that should make it easier to use and able to tackle much larger problems, said the company. The model can now handle optimization problems with up to 1 million variables (including continuous variables) and 100,000 constraints. In addition, D-Wave has introduced a “new [pre-solver] set of fast classical algorithms that reduces the size of the problem and allows for larger models to be submitted to the hybrid solver.”

While talk of using hybrid quantum-classical solutions has intensified recently among the gate-based quantum computer developer community, D-Wave has actively explored hybrid approaches for use with its quantum annealing computers for some time. It introduced a hybrid solver service (HSS) as part its Leap web access portal and Ocean SDK development kit that D-Wave in 2020. The broad hybrid idea is to use classical compute resources where they make sense – for example, GPUs perform matrix multiplication faster – and use quantum resources where they add benefit.

Continue reading “Quantum Annealing Pioneer D-Wave Introduces Expanded Hybrid Solver” »

Chipmakers are looking for ways to boost speed as the end of Moore’s Law looms. Do silicon photonic chips hold the key?

Year 2019 face_with_colon_three

Photonic quantum computing is one of the leading approaches to universal quantum computation. However, large-scale implementation of photonic quantum computing has been hindered by its intrinsic difficulties, such as probabilistic entangling gates for photonic qubits and lack of scalable ways to build photonic circuits. Here, we discuss how to overcome these limitations by taking advantage of two key ideas which have recently emerged. One is a hybrid qubit-continuous variable approach for realizing a deterministic universal gate set for photonic qubits. The other is the time-domain multiplexing technique to perform arbitrarily large-scale quantum computing without changing the configuration of photonic circuits. These ideas together will enable scalable implementation of universal photonic quantum computers in which hardware-efficient error correcting codes can be incorporated. Furthermore, all-optical implementation of such systems can increase the operational bandwidth beyond terahertz in principle, ultimately enabling large-scale fault-tolerant universal quantum computers with ultrahigh operation frequency.

A multi-institutional team has created an efficient method for measuring high-dimensional qudits encoded in quantum frequency combs, a kind of photon source, on a single optical chip using already available experimental and computational resources.

Despite the fact that the word “qudit” may appear to be a typo, this less well-known relative of the qubit, or quantum bit, has the ability to carry more data and is more noise-resistant, two crucial characteristics required to enhance the performance of quantum networks, quantum key distribution systems, and eventually the quantum internet.

In contrast to traditional computer bits, which classify data as ones or zeros, qubits can hold values of one, zero, or both. This is due to superposition, a phenomenon that enables several quantum states to exist simultaneously. Qudit’s “d” refers to the variety of levels or values that may be encoded on a photon. Traditional qubits only have two levels, but by adding more levels, they become qudits.

An update for AMD’s ROCm general-purpose GPU software has reportedly revealed the specs for Navi 32 and Navi 33, (opens in new tab) the next graphics chips likely to be released in the RDNA 3 series, otherwise known as Radeon RX-7000 series. Exactly where the new chips will slot into AMD’s new Radeon RX 7000-series (opens in new tab) is the really big question.

Are these chips the basis of the upcoming Radeon RX 7,800 and 7,700 GPUs? Hold that thought while we consider the new information that’s emerged. Buried deep within an ROCm file called “performance.hpp” are references to both Navi 32 and Navi. But the really critical numbers listed in the file are 60 and 32, and we’re talking CUs or Compute Units. To make sense of those numbers, the Navi 31 chip inside the AMD Radeon RX 7,900 XT and XTX graphics cards runs 96 CUs.

58 billion transistors 😗

AMD Navi 31, 2394 MHz, 5,376 Cores, 336 TMUs, 192 ROPs, 20,480 MB GDDR6, 2,500 MHz, 320 bit.

“Thermal issues are currently one of the biggest bottlenecks that are plaguing any kind of microelectronics,” says team lead Srabanti Chowdhury, professor of electrical engineering at Stanford University. “We asked ourselves, ‘Can we perform device cooling at the very material level without paying a penalty in electrical performance?’”

Indeed, they could. The engineers grew a heat-wicking diamond layer right on top of individual transistors—their hottest points—as well as on their sides. Heat flowed through the diamond to a heat sink on the back of the device. With this technique, the researchers achieved temperatures 100 degrees Celsius lower without any degradation of the device’s electrical properties. They will report their findings in San Francisco at the IEEE International Electron Device Meeting in December.

They demonstrated their technique on gallium nitride (GaN) high-electron-mobility transistors, or HEMTs. GaN is the go-to alternative to silicon for high-frequency applications, as it can sustain higher electric fields and responds more quickly to electric field changes. GaN also breaks down at a higher temperature than silicon. But not high enough: “If you go by the physics of the material, you see what its potential is, and we’re nowhere close to that today,” says Chowdhury. Keeping GaN HEMTs cool as devices shrink and frequencies grow will allow them to live up to their physics-promised potential.

Year 2016 face_with_colon_three

In the future, can humans control computer-operated machines by simply “thinking”?